A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ Learning

May 28, 2015 ยท Declared Dead ยท ๐Ÿ› IEEE Transactions on Circuits and Systems - II - Express Briefs

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Authors Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal arXiv ID 1505.07814 Category cs.NE: Neural & Evolutionary Citations 142 Venue IEEE Transactions on Circuits and Systems - II - Express Briefs Last Checked 4 months ago
Abstract
Nanoscale resistive memories are expected to fuel dense integration of electronic synapses for large-scale neuromorphic system. To realize such a brain-inspired computing chip, a compact CMOS spiking neuron that performs in-situ learning and computing while driving a large number of resistive synapses is desired. This work presents a novel leaky integrate-and-fire neuron design which implements the dual-mode operation of current integration and synaptic drive, with a single opamp and enables in-situ learning with crossbar resistive synapses. The proposed design was implemented in a 0.18 $ฮผ$m CMOS technology. Measurements show neuron's ability to drive a thousand resistive synapses, and demonstrate an in-situ associative learning. The neuron circuit occupies a small area of 0.01 mm$^2$ and has an energy-efficiency of 9.3 pJ$/$spike$/$synapse.
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