TouchΓ©: Towards Ideal and Efficient Cache Compression By Mitigating Tag Area Overheads
September 02, 2019 Β· Declared Dead Β· π Micro
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Authors
Seokin Hong, Bulent Abali, Alper Buyuktosunoglu, Michael B. Healy, Prashant J. Nair
arXiv ID
1909.00553
Category
cs.AR: Hardware Architecture
Cross-listed
cs.DC,
cs.PF,
eess.SY
Citations
18
Venue
Micro
Last Checked
3 months ago
Abstract
Compression is seen as a simple technique to increase the effective cache capacity. Unfortunately, compression techniques either incur tag area overheads or restrict data placement to only include neighboring compressed cache blocks to mitigate tag area overheads. Ideally, we should be able to place arbitrary compressed cache blocks without any placement restrictions and tag area overheads. This paper proposes TouchΓ©, a framework that enables storing multiple arbitrary compressed cache blocks within a physical cacheline without any tag area overheads. The TouchΓ© framework consists of three components. The first component, called the ``Signature'' (SIGN) engine, creates shortened signatures from the tag addresses of compressed blocks. Due to this, the SIGN engine can store multiple signatures in each tag entry. On a cache access, the physical cacheline is accessed only if there is a signature match (which has a negligible probability of false positive). The second component, called the ``Tag Appended Data'' (TADA) mechanism, stores the full tag addresses with data. TADA enables TouchΓ© to detect false positive signature matches by ensuring that the actual tag address is available for comparison. The third component, called the ``Superblock Marker'' (SMARK) mechanism, uses a unique marker in the tag entry to indicate the occurrence of compressed cache blocks from neighboring physical addresses in the same cacheline. TouchΓ© is completely hardware-based and achieves an average speedup of 12\% (ideal 13\%) when compared to an uncompressed baseline.
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