Real-time ultra-low power ECG anomaly detection using an event-driven neuromorphic processor
November 13, 2019 Β· Declared Dead Β· π IEEE Transactions on Biomedical Circuits and Systems
"No code URL or promise found in abstract"
Evidence collected by the PWNC Scanner
Authors
Felix Christian Bauer, Dylan Richard Muir, Giacomo Indiveri
arXiv ID
1911.05521
Category
eess.SP: Signal Processing
Cross-listed
cs.LG,
cs.NE
Citations
109
Venue
IEEE Transactions on Biomedical Circuits and Systems
Last Checked
4 months ago
Abstract
Accurate detection of pathological conditions in human subjects can be achieved through off-line analysis of recorded biological signals such as electrocardiograms (ECGs). However, human diagnosis is time-consuming and expensive, as it requires the time of medical professionals. This is especially inefficient when indicative patterns in the biological signals are infrequent. Moreover, patients with suspected pathologies are often monitored for extended periods, requiring the storage and examination of large amounts of non-pathological data, and entailing a difficult visual search task for diagnosing professionals. In this work we propose a compact and sub-mW low power neural processing system that can be used to perform on-line and real-time preliminary diagnosis of pathological conditions, to raise warnings for the existence of possible pathological conditions, or to trigger an off-line data recording system for further analysis by a medical professional. We apply the system to real-time classification of ECG data for distinguishing between healthy heartbeats and pathological rhythms. Multi-channel analog ECG traces are encoded as asynchronous streams of binary events and processed using a spiking recurrent neural network operated in a reservoir computing paradigm. An event-driven neuron output layer is then trained to recognize one of several pathologies. Finally, the filtered activity of this output layer is used to generate a binary trigger signal indicating the presence or absence of a pathological pattern. We validate the approach proposed using a Dynamic Neuromorphic Asynchronous Processor (DYNAP) chip, implemented using a standard 180 nm CMOS VLSI process, and present experimental results measured from the chip.
Community Contributions
Found the code? Know the venue? Think something is wrong? Let us know!
π Similar Papers
In the same crypt β Signal Processing
R.I.P.
π»
Ghosted
π
π
The Cartographer
1D Convolutional Neural Networks and Applications: A Survey
R.I.P.
π»
Ghosted
Wireless Communications with Reconfigurable Intelligent Surface: Path Loss Modeling and Experimental Measurement
π
π
The Cartographer
Accessing From The Sky: A Tutorial on UAV Communications for 5G and Beyond
R.I.P.
π»
Ghosted
6G Wireless Systems: Vision, Requirements, Challenges, Insights, and Opportunities
R.I.P.
π»
Ghosted
A New Wireless Communication Paradigm through Software-controlled Metasurfaces
Died the same way β π» Ghosted
R.I.P.
π»
Ghosted
Federated Learning: Strategies for Improving Communication Efficiency
R.I.P.
π»
Ghosted
In-Datacenter Performance Analysis of a Tensor Processing Unit
R.I.P.
π»
Ghosted
Deep Convolutional Neural Networks for Computer-Aided Detection: CNN Architectures, Dataset Characteristics and Transfer Learning
R.I.P.
π»
Ghosted