Dagger: Towards Efficient RPCs in Cloud Microservices with Near-Memory Reconfigurable NICs
July 16, 2020 Β· Declared Dead Β· π IEEE computer architecture letters
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Authors
Nikita Lazarev, Neil Adit, Shaojie Xiang, Zhiru Zhang, Christina Delimitrou
arXiv ID
2007.08622
Category
cs.AR: Hardware Architecture
Cross-listed
cs.NI
Citations
20
Venue
IEEE computer architecture letters
Last Checked
6 months ago
Abstract
Cloud applications are increasingly relying on hundreds of loosely-coupled microservices to complete user requests that meet an applications end-to-end QoS requirements. Communication time between services accounts for a large fraction of the end-to-end latency and can introduce performance unpredictability and QoS violations. This work presents our early work on Dagger, a hardware acceleration platform for networking, designed specifically with the unique qualities of microservices in mind. The Dagger architecture relies on an FPGA-based NIC, closely coupled with the processor over a configurable memory interconnect, designed to offload and accelerate RPC stacks. Unlike the traditional cloud systems that use PCIe links as the NIC I/O interface, we leverage memory-interconnected FPGAs as networking devices to provide the efficiency, transparency, and programmability needed for fine-grained microservices. We show that this considerably improves CPU utilization and performance for cloud RPCs.
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